Lecture Design of Embedded Systems with Digital Logic


VAK 03-ME-712.05
Category: Lecture+Lesson, 4 SWS
Master Course
ECTS: 6, Winter Semester
University of Bremen
Lecturer: PD Dr. Stefan Bosse

This lecture is intended to give an introduction to hardware and system design with application-specific configurable digital logic using VHDL synthesis and its applications. Hardware synthesis is an automatic process to get a behavioral and structural description of logic circuits and netlists that are directly technologically feasible. The hardware description language used should be independent of the target technology. In hardware design, system-on-chip architecture and modeling methods play a key role. The central data processing architecture is based on the the Register-Transfer Level model.


  1. Motivation and introduction

    • Use and limitations of classical microprocessors in digital signal processing
    • Digital signal processing and applications
    • Data and control flow in digital signal processing
    • Sequential systems and parallelism
    • Benefits of custom parallel systems
    • Configurable processors as an alternative
    • State machines and register transfer logic
  2. Introduction to Fundamentals of Digital Logic and Boolean Algebra

    • Basic logic functions and technical implementation
    • Transistor logic
    • Boolean algebra, normal forms, and logic minimization
    • KV diagrams and procedures according to Quine and McCluskey
    • Combinatorial Logic - Arithmetic Functions
  3. "Programmable" logic devices: MUX, RAM/ROM, GAL, PAL, CPLD, FPGA, ASIC

  4. Simple digital systems with combinatorial logic

  5. Register-transfer based sequential systems

  6. State machines: their application and realization

  7. Introduction to VHDL (in parallel to the above content)

    • Interface Description
    • Architecture
    • Configuration
    • Data objects, control elements
  8. Basics of Digital Logic Synthesis and Synthesis Techniques

  9. Levels in Digital Electronics Design
    • System level
    • Algorithmic level
    • Register transfer level
    • Logic level
    • Electronic circuits


[Lecture Script]
PDL 2017, Revision 20.6.2017, PDF